Invention Grant
- Patent Title: Semiconductor device suitable for a stacked structure
- Patent Title (中): 适用于堆叠结构的半导体器件
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Application No.: US12210645Application Date: 2008-09-15
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Publication No.: US07884459B2Publication Date: 2011-02-08
- Inventor: Eiji Yoshida , Takao Ohno , Yoshito Akutagawa , Koji Sawahata , Masataka Mizukoshi , Takao Nishimura , Akira Takashima , Mitsuhisa Watanabe
- Applicant: Eiji Yoshida , Takao Ohno , Yoshito Akutagawa , Koji Sawahata , Masataka Mizukoshi , Takao Nishimura , Akira Takashima , Mitsuhisa Watanabe
- Applicant Address: JP Yokohama
- Assignee: Fujitsu Semiconductor Limited
- Current Assignee: Fujitsu Semiconductor Limited
- Current Assignee Address: JP Yokohama
- Agency: Westerman, Hattori, Daniels & Adrian, LLP
- Main IPC: H01L23/02
- IPC: H01L23/02
Abstract:
A semiconductor device is provided that forms a three-dimensional semiconductor device having semiconductor devices stacked on one another. In this semiconductor device, a hole is formed in a silicon semiconductor substrate that has an integrated circuit unit and an electrode pad formed on a principal surface on the outer side. The hole is formed by etching, with the electrode pad serving as an etching stopper layer. An embedded electrode is formed in the hole. This embedded electrode serves to electrically lead the electrode pad to the principal surface on the bottom side of the silicon semiconductor substrate.
Public/Granted literature
- US20090008798A1 SEMICONDUCTOR DEVICE SUITABLE FOR A STACKED STRUCTURE Public/Granted day:2009-01-08
Information query
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