Invention Grant
- Patent Title: Packaging for high speed integrated circuits
- Patent Title (中): 高速集成电路封装
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Application No.: US11472904Application Date: 2006-06-22
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Publication No.: US07884451B2Publication Date: 2011-02-08
- Inventor: Sehat Sutardja
- Applicant: Sehat Sutardja
- Applicant Address: BB St. Michael
- Assignee: Marvell World Trade Ltd.
- Current Assignee: Marvell World Trade Ltd.
- Current Assignee Address: BB St. Michael
- Main IPC: H01L23/495
- IPC: H01L23/495

Abstract:
An integrated circuit package comprises an integrated circuit die comprising a first pad, a second pad adjacent to the first pad, a third pad adjacent to the second pad, and a fourth pad adjacent to the third pad. A lead frame comprising a first lead, a second lead adjacent to the first lead, a third lead adjacent to the second lead, and a fourth lead adjacent to the third lead. First, second, third and fourth bondwires connect the first, second, third and fourth leads to the first, second, third and fourth pads, respectively. The first and second leads and the third and fourth leads are spaced at a first distance and the second and third leads are spaced at a second distance that is different than the first distance.
Public/Granted literature
- US20070018288A1 Packaging for high speed integrated circuits Public/Granted day:2007-01-25
Information query
IPC分类: