Invention Grant
- Patent Title: Semiconductor device and method of manufacturing the same
- Patent Title (中): 半导体装置及其制造方法
-
Application No.: US11882854Application Date: 2007-08-06
-
Publication No.: US07884421B2Publication Date: 2011-02-08
- Inventor: Hiroshi Yanagigawa
- Applicant: Hiroshi Yanagigawa
- Applicant Address: JP Kawasaki-shi, Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi, Kanagawa
- Agency: McGinn Intellectual Property Law Group, PLLC
- Priority: JP2006-214738 20060807
- Main IPC: H01L29/66
- IPC: H01L29/66
Abstract:
In a high voltage MOS transistor, in a portion immediately below the gate electrode, peaks of concentration distribution in depth direction of a first conductivity type impurity and a second conductivity type impurity in the drain offset region are in the same depth, the second conductivity type impurity being higher concentrated than the first conductivity type impurity.
Public/Granted literature
- US20080029813A1 Semiconductor device and method of manufacturing the same Public/Granted day:2008-02-07
Information query
IPC分类:
