Invention Grant
- Patent Title: Semiconductor integrated circuit
- Patent Title (中): 半导体集成电路
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Application No.: US11853415Application Date: 2007-09-11
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Publication No.: US07884416B2Publication Date: 2011-02-08
- Inventor: Hiroshi Watanabe , Akira Nishiyama
- Applicant: Hiroshi Watanabe , Akira Nishiyama
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2006-257752 20060922; JP2007-186344 20070717
- Main IPC: H01L29/788
- IPC: H01L29/788

Abstract:
A semiconductor integrated circuit according to an example of the present invention includes a semiconductor substrate, an element isolation insulating layer formed in a surface region of the semiconductor substrate, and first and second MIS type devices isolated from each other by the element isolation insulating layer and formed in adjacent first and second element regions in a second direction orthogonal to a first direction. Each of the first and second MIS type devices has a stack gate structure having a floating gate and a control gate electrode. The first MIS type device functions as an aging device, and the second MIS type device functions as a control device which controls an electric charge retention characteristic of the aging device.
Public/Granted literature
- US20080074180A1 SEMICONDUCTOR INTEGRATED CIRCUIT Public/Granted day:2008-03-27
Information query
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