Invention Grant
- Patent Title: Method for manufacturing semiconductor device
- Patent Title (中): 制造半导体器件的方法
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Application No.: US12613552Application Date: 2009-11-06
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Publication No.: US07883939B2Publication Date: 2011-02-08
- Inventor: Akihiro Chida
- Applicant: Akihiro Chida
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Robinson Intellectual Property Law Office, P.C.
- Agent Eric J. Robinson
- Priority: JP2008-288760 20081111
- Main IPC: H01L21/60
- IPC: H01L21/60

Abstract:
A method for manufacturing a thin but robust stack of electrically connected thin film semiconductor elements includes the steps of forming a first element to be stacked: forming a separation layer and a semiconductor element layer over a substrate, forming a wiring connected to the semiconductor element layer, forming a protective material over the semiconductor layer and the wiring, forming a conductive region electrically connected to the wiring in the protective layer, and separating the semiconductor element layer from the substrate along the separation layer. A second element is formed according to the aforementioned process, and the first element is stacked thereon, before separating the second element from its substrate. The first element is bonded to the protective layer of the second element so that the semiconductor element layers of the first and the second element are electrically connected to each other through the protective layer, without damaging the protective layer.
Public/Granted literature
- US20100120200A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2010-05-13
Information query
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