Invention Grant
US07881894B2 Method and circuit for local clock generation and smartcard including it thereon
有权
用于本地时钟产生的方法和电路以及包括其上的智能卡
- Patent Title: Method and circuit for local clock generation and smartcard including it thereon
- Patent Title (中): 用于本地时钟产生的方法和电路以及包括其上的智能卡
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Application No.: US12089897Application Date: 2006-06-10
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Publication No.: US07881894B2Publication Date: 2011-02-01
- Inventor: Robert Leydier , Alain Pomet , Benjamin Duval
- Applicant: Robert Leydier , Alain Pomet , Benjamin Duval
- Applicant Address: FR Meudon FR Montrouge
- Assignee: Gemalto SA,STMicroelectronics, SA
- Current Assignee: Gemalto SA,STMicroelectronics, SA
- Current Assignee Address: FR Meudon FR Montrouge
- Agency: The Jansson Firm
- Agent Pehr B. Jansson
- Priority: EP05292108 20051010
- International Application: PCT/IB2006/002860 WO 20060610
- International Announcement: WO2007/042928 WO 20070419
- Main IPC: G06F1/04
- IPC: G06F1/04

Abstract:
One delay circuit is inserted in open loop inside a clock recovery circuit for improving the accuracy of clock recovery. One oscillator signal φ(0) to φ(2i−1) is provided with a basic Step of Time. A rational number of Step of Time corresponding to a bit-duration is measured inside a received flow of bits. The oscillator signal φ(0) to j(2i−1) is transformed into a clock signal CK having active edges of said clock signal in phase with at least one oscillator signal φ(0) to φ(2i−1), two consecutive active edges being separated by a time duration proportional to the integer part of the number of Step of Time. A time delay is computed proportional to the fractional part of the number of Step of Time. The next active edge of the clock signal CK is delayed of said computed delay.
Public/Granted literature
- US20080231328A1 Method and Circuit for Local Clock Generation and Smartcard Including it Thereon Public/Granted day:2008-09-25
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