Invention Grant
- Patent Title: Wafer edge inspection and metrology
- Patent Title (中): 晶圆边缘检查和计量
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Application No.: US12571801Application Date: 2009-10-01
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Publication No.: US07865010B2Publication Date: 2011-01-04
- Inventor: Ajay Pai , Tuan D. Le
- Applicant: Ajay Pai , Tuan D. Le
- Applicant Address: US NJ Flanders
- Assignee: Rudolph Technologies, Inc.
- Current Assignee: Rudolph Technologies, Inc.
- Current Assignee Address: US NJ Flanders
- Agency: Dicke, Billig & Czaja, PLLC
- Main IPC: G06K9/00
- IPC: G06K9/00

Abstract:
Some aspects of the present invention relate to a wafer inspection method. A plurality of images is acquired about an edge portion of a wafer. Each of the images comprises a pixel array having a first dimension and a second dimension. A composite image of compressed pixel arrays is generated by compressing each of the pixel arrays in the first dimension and concatenating the pixel arrays. The composite image is analyzed to identify a wafer feature, for example using a sinusoidal line fit.
Public/Granted literature
- US20100086197A1 WAFER EDGE INSPECTION AND METROLOGY Public/Granted day:2010-04-08
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