Invention Grant
US07864578B2 Semiconductor memory repairing a defective bit and semiconductor memory system
有权
半导体存储器修复有缺陷的位和半导体存储器系统
- Patent Title: Semiconductor memory repairing a defective bit and semiconductor memory system
- Patent Title (中): 半导体存储器修复有缺陷的位和半导体存储器系统
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Application No.: US12164782Application Date: 2008-06-30
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Publication No.: US07864578B2Publication Date: 2011-01-04
- Inventor: Tomoji Takada
- Applicant: Tomoji Takada
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G11C7/00 ; G11C29/00

Abstract:
A semiconductor memory has a plurality of blocks, and each of the blocks comprises a plurality of pages, and further, each of the pages has a plurality of memory cells. A block having defective bits less than N (N is an integer number more than 0) in all pages of the block stores a first data showing a normal block. A block including at least one page having defective bits more than N and including no page having defective bits more than M (M is an integer number of M>N) stores a second data showing a psedo-pass block as a pseudo-normal block. A block including at least one page having defective bits more than M stores a third data showing a defective block.
Public/Granted literature
- US20090323417A1 SEMICONDUCTOR MEMORY REPAIRING A DEFECTIVE BIT AND SEMICONDUCTOR MEMORY SYSTEM Public/Granted day:2009-12-31
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