A gate driving circuit for a liquid crystal display device includes a plurality of shift register stages each including pull-up and pull-down transistors, wherein each of the pull-up and pull-down transistors is connected to a gate driving signal output terminal and controlled by voltages on first and second nodes, respectively, and wherein the pull-down transistors of a (2n−1)th shift register stage and a (2n)th shift register stage are connected to each other; and a control signal generating unit alternately supplying one of first and second control signals to the pull-down transistors of the (2n−1)th and (2n)th shift register stages and supplying the other of the first and second control signals to the pull-down transistors of the (2n+1)th and (2n+2)th shift register stages, wherein n is an positive integer.