An address decoder that sets an address of a module connected to a bus includes a level comparator, an edge detector, and an output decoder. The level comparator compares an SDA signal, which is input to an SDA terminal, with an address selection signal, which is input to an ADDR terminal, and outputs a comparison result. When the two signals match, the comparison is repeated until slave addresses are all received. When the two signals do not match, subsequent comparisons are not performed. The edge detector detects an edge of the address selection signal input to the ADDR terminal. The output decoder sets an address corresponding to the connected destination of the ADDR terminal to determine an address of a slave module connected to the address decoder.