Invention Grant
US07863668B2 Nonvolatile semiconductor memory device with memory cell array region and dummy cell region
失效
具有存储单元阵列区域和虚拟单元区域的非易失性半导体存储器件
- Patent Title: Nonvolatile semiconductor memory device with memory cell array region and dummy cell region
- Patent Title (中): 具有存储单元阵列区域和虚拟单元区域的非易失性半导体存储器件
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Application No.: US11449827Application Date: 2006-06-09
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Publication No.: US07863668B2Publication Date: 2011-01-04
- Inventor: Shinya Takahashi
- Applicant: Shinya Takahashi
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
- Priority: JP2005-171306 20050610
- Main IPC: H01L29/788
- IPC: H01L29/788
Abstract:
A semiconductor device includes a semiconductor substrate, a memory cell region provided on the semiconductor substrate, a word line provided on the memory cell region, a first gate insulating film provided in the memory cell region beneath the word line, a first floating gate electrode provided on the first gate insulating film, a second gate insulating film provided in the memory cell region beneath the word line, the second gate insulating film being different from the first gate insulating film in thickness, and a second floating gate electrode provided on the second gate insulating film.
Public/Granted literature
- US20060278919A1 Semiconductor device and method for semiconductor device Public/Granted day:2006-12-14
Information query
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