Invention Grant
- Patent Title: Semiconductor device and manufacturing method therefor
- Patent Title (中): 半导体装置及其制造方法
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Application No.: US12179615Application Date: 2008-07-25
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Publication No.: US07863622B2Publication Date: 2011-01-04
- Inventor: Shunpei Yamazaki , Hisashi Ohtani , Toshiji Hamatani
- Applicant: Shunpei Yamazaki , Hisashi Ohtani , Toshiji Hamatani
- Applicant Address: JP Kanagawa-Ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Kanagawa-Ken
- Agency: Nixon Peabody LLP
- Agent Jeffrey L. Costellia
- Priority: JP10-311633 19981102; JP10-336561 19981110
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
An active layer of an NTFT includes a channel forming region, at least a first impurity region, at least a second impurity region and at least a third impurity region therein. Concentrations of an impurity in each of the first, second and third impurity regions increase as distances from the channel forming region become longer. The first impurity region is formed to be overlapped with a side wall. A gate overlapping structure can be realized with the side wall functioning as an electrode.
Public/Granted literature
- US20080308830A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR Public/Granted day:2008-12-18
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