Invention Grant
US07863610B2 Integrated circuit including silicide region to inhibit parasitic currents
有权
集成电路包括硅化物区域以抑制寄生电流
- Patent Title: Integrated circuit including silicide region to inhibit parasitic currents
- Patent Title (中): 集成电路包括硅化物区域以抑制寄生电流
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Application No.: US11843044Application Date: 2007-08-22
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Publication No.: US07863610B2Publication Date: 2011-01-04
- Inventor: Bipin Rajendran , Shoaib Hasan.Zaidi
- Applicant: Bipin Rajendran , Shoaib Hasan.Zaidi
- Applicant Address: US NC Cary US NY Armonk
- Assignee: Qimonda North America Corp.,International Business Machines Corporation
- Current Assignee: Qimonda North America Corp.,International Business Machines Corporation
- Current Assignee Address: US NC Cary US NY Armonk
- Agency: Dicke, Billig & Czaja, PLLC
- Main IPC: H01L29/10
- IPC: H01L29/10 ; H01L21/70
Abstract:
An integrated circuit is disclosed. One embodiment includes a first diode, a second diode, and a semiconductor line coupled to the first diode and the second diode. The line includes a first silicide region between the first diode and the second diode.
Public/Granted literature
- US20090052230A1 INTEGRATED CIRCUIT INCLUDING SILICIDE REGION TO INHIBIT PARASITIC CURRENTS Public/Granted day:2009-02-26
Information query
IPC分类:
