Invention Grant
US07863112B2 Method and structure to protect FETs from plasma damage during FEOL processing
有权
在FEOL处理期间保护FET免受等离子体损伤的方法和结构
- Patent Title: Method and structure to protect FETs from plasma damage during FEOL processing
- Patent Title (中): 在FEOL处理期间保护FET免受等离子体损伤的方法和结构
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Application No.: US11970579Application Date: 2008-01-08
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Publication No.: US07863112B2Publication Date: 2011-01-04
- Inventor: Deleep R. Nair , Terence B. Hook
- Applicant: Deleep R. Nair , Terence B. Hook
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Yuanmin Cai; Howard M. Cohn
- Main IPC: H01L21/8283
- IPC: H01L21/8283
Abstract:
Protecting a FET from plasma damage during FEOL processing by forming a FET-like structure in conjunction with and adjacent to an FET, in a same well as the FET, but having a body doped opposite to the well polarity. The FET-like structure is formed with thinner oxide than the gate oxide of the FET, has a gate structure (poly) connected with the gate of the FET, and may be shorted out by the first metal layer (M1).
Public/Granted literature
- US20090174008A1 METHOD AND STRUCTURE TO PROTECT FETs FROM PLASMA DAMAGE DURING FEOL PROCESSING Public/Granted day:2009-07-09
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