A semiconductor memory device comprising a memory cell array of cross-point type having memory cells each composed of a variable resistive element for storing information in the form of variation of the electrical resistance. The operating current in the programming operation is reduced. Main data lines (GDL0 to GDL7) for supplying predetermined data line voltages to each of the corresponding data lines (DL0 to DL7) of the memory cell arrays (BK0 to BK3) arranged at least in the row direction extend in the row direction and are connected to the corresponding data lines (DL0 to DL7) through individual data line selecting transistors (TD0k to TD7k) in the memory cell arrays (BK0 to BK3). The number of data lines (DL0 to DL7) of the memory cell arrays (BK0 to BK3) is equal to the largest number of memory cells in which data is simultaneously programmed in one write operation.