Invention Grant
- Patent Title: Comparator with latching function
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Application No.: US12394018Application Date: 2009-02-26
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Publication No.: US07847576B2Publication Date: 2010-12-07
- Inventor: Shoji Koiima
- Applicant: Shoji Koiima
- Applicant Address: JP Tokyo
- Assignee: Advantest Corporation
- Current Assignee: Advantest Corporation
- Current Assignee Address: JP Tokyo
- Agency: Martine Penilla & Gencarella LLP
- Main IPC: G01R31/26
- IPC: G01R31/26

Abstract:
A comparison amplification unit compares a level of a signal in a positive line with that of a signal in a negative line and latches a comparison result. An input terminal of a first inverter is connected to the positive line and an output terminal thereof is connected to the negative line. An input terminal of a second inverter is connected to the negative line and an output terminal thereof is connected to the positive line. An activation switch selectively switches between a state where the activation switch outputs a power supply voltage to the other power supply terminals of the inverters that are connected in common, such that the comparison amplification unit is inactivated, and a state where the activation switch outputs the ground voltage such that the comparison amplification is activated. The comparator outputs a signal corresponding to at least one of the signal in the positive line and the signal in the negative line at a timing after the comparison amplification unit is activated.
Public/Granted literature
- US20100213966A1 Comparator with latching function Public/Granted day:2010-08-26
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