Invention Grant
- Patent Title: Non-volatile memory cell array and logic
- Patent Title (中): 非易失性存储单元阵列和逻辑
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Application No.: US12168448Application Date: 2008-07-07
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Publication No.: US07847374B1Publication Date: 2010-12-07
- Inventor: Chih-Hsin Wang
- Applicant: Chih-Hsin Wang
- Main IPC: H01L29/73
- IPC: H01L29/73

Abstract:
A semiconductor device comprising a memory region including one or more transistor string arrays, a logic region including one or more logic transistors and an isolation region for isolating the logic transistors. The string array includes a plurality, T, of bipolar junction transistors. The string array includes a common collector region for the T bipolar junction transistors, a common base region for the T bipolar junction transistors, a plurality of emitters, one emitter for each of the T bipolar junction transistors, a number, B, of base contacts for the T bipolar junction transistors where the base contacts electrically couple the common base region and where the number of base contacts, B, is less than the number of transistors, T.
Information query
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