In some embodiments, a chip includes a memory core, a write buffer, transmitters, receivers to receive groups of signals including write data signals and associated error detection signals, and circuitry to provide the error detection signals to the transmitters to be transmitted to another chip and to provide the write data signals to the write buffer. The write data signals are held in the write buffer at least until it is determined whether their associated transmitted error detection signals match corresponding error detection signals stored in the other chip. Other embodiments are described and claimed.