Invention Grant
- Patent Title: Electronic device with serial ATA interface and power saving method for serial ATA buses
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Application No.: US12398544Application Date: 2009-03-05
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Publication No.: US07809967B2Publication Date: 2010-10-05
- Inventor: Fubito Igari
- Applicant: Fubito Igari
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Foley & Lardner LLP
- Priority: JP2003-310361 20030902
- Main IPC: G06F1/32
- IPC: G06F1/32 ; G06F1/00
Abstract:
In an electronic device with a serial ATA interface, upon detection of the issue or reception of a preset command, a confirmation device, such as a CPU, confirms the completion of execution of the command. Upon confirming the completion of execution of the command, a controller, which may also be the CPU, controls shifting of the serial ATA interface to a power saving mode.
Public/Granted literature
- US20090172313A1 ELECTRONIC DEVICE WITH SERIAL ATA INTERFACE AND POWER SAVING METHOD FOR SERIAL ATA BUSES Public/Granted day:2009-07-02
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