Invention Grant
US07808274B2 Monolithically integrated multiplexer-translator-demultiplexer circuit and method
有权
单片集成多路复用器 - 转换器 - 解复用器电路和方法
- Patent Title: Monolithically integrated multiplexer-translator-demultiplexer circuit and method
- Patent Title (中): 单片集成多路复用器 - 转换器 - 解复用器电路和方法
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Application No.: US11966723Application Date: 2007-12-28
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Publication No.: US07808274B2Publication Date: 2010-10-05
- Inventor: Frank Dover , James Lepkowski , Aurelio Pimentel
- Applicant: Frank Dover , James Lepkowski , Aurelio Pimentel
- Applicant Address: US AZ Phoenix
- Assignee: Semiconductor Components Industries, LLC
- Current Assignee: Semiconductor Components Industries, LLC
- Current Assignee Address: US AZ Phoenix
- Agent Rennie William Dover
- Main IPC: H03K19/0175
- IPC: H03K19/0175 ; H03L5/00

Abstract:
A monolithically integrated multiplexer-translator-demultiplexer and a method for multiplexing and translating an electrical signal or demultiplexing and translating an electrical signal. A multiplexer and a demultiplexer are monolithically integrated with a translator. Circuits that operate at different voltage supply levels from each other may be coupled to the multiplexer and a circuit that operates at a different voltage supply level from the circuits coupled to the multiplexer or that operates at the same voltage supply level as at least one of the circuits coupled to the multiplexer is coupled to the demultiplexer. The monolithically integrated multiplexer-translator-demultiplexer selects a signal from one of the circuits coupled to the multiplexer, translates its voltage level and provides the translated signal level as an output signal. Alternatively, the monolithically integrated multiplexer-translator-demultiplexer creates demultiplexed signals from an electrical signal and translates the voltage levels of the demultiplexed signals.
Public/Granted literature
- US20090167356A1 MONOLITHICALLY INTEGRATED MULTIPLEXER-TRANSLATOR-DEMULTIPLEXER CIRCUIT AND METHOD Public/Granted day:2009-07-02
Information query
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