Invention Grant
US07790525B2 Method of achieving dense-pitch interconnect patterning in integrated circuits
有权
在集成电路中实现密集间距互连图案化的方法
- Patent Title: Method of achieving dense-pitch interconnect patterning in integrated circuits
- Patent Title (中): 在集成电路中实现密集间距互连图案化的方法
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Application No.: US11874501Application Date: 2007-10-18
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Publication No.: US07790525B2Publication Date: 2010-09-07
- Inventor: Steven Lee Prins , James Walter Blatchford
- Applicant: Steven Lee Prins , James Walter Blatchford
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent John J. Patti; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/84 ; H01L21/8234

Abstract:
Components in integrated circuits (ICs) are fabricated as small as possible to minimize sizes of the ICs and thus reduce manufacturing costs per IC. Metal interconnect lines are formed on minimum pitches possible using available photolithographic printers. Minimum pitches possible for contacts and vias are larger than minimum pitches possible for metal interconnect lines, thus preventing dense rectilinear grid configurations for contacts and vias. The instant invention is an integrated circuit, and a method of fabricating an integrated circuit, wherein metal interconnect lines are formed on a minimum pitch possible using a photolithographic printer. Contacts and vias are arranged to provide connections to components and metal interconnect lines, as required by the integrated circuit, in configurations that are compatible with the minimum pitch for contacts and vias, including semi-dense arrays.
Public/Granted literature
- US20090101983A1 Method of Achieving Dense-Pitch Interconnect Patterning in Integrated Circuits Public/Granted day:2009-04-23
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