Invention Grant
US07789477B2 Method for testing integrity of a base for printhead integrated circuitry
有权
用于测试打印头集成电路基座完整性的方法
- Patent Title: Method for testing integrity of a base for printhead integrated circuitry
- Patent Title (中): 用于测试打印头集成电路基座完整性的方法
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Application No.: US12193726Application Date: 2008-08-19
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Publication No.: US07789477B2Publication Date: 2010-09-07
- Inventor: Stephen John Sleijpen , Joseph Tharion , Jan Waszczuk , Eric Patrick O'Donnell , William Granger , David Bernardi , Stephen Richard O'Farrell , Jason Mark Thelander
- Applicant: Stephen John Sleijpen , Joseph Tharion , Jan Waszczuk , Eric Patrick O'Donnell , William Granger , David Bernardi , Stephen Richard O'Farrell , Jason Mark Thelander
- Applicant Address: AU Balmain, New South Wales
- Assignee: Silverbrook Research Pty Ltd
- Current Assignee: Silverbrook Research Pty Ltd
- Current Assignee Address: AU Balmain, New South Wales
- Main IPC: B41J29/393
- IPC: B41J29/393

Abstract:
Provided is a method for testing integrity of a base for printhead integrated circuits. The base has at least one fluid inlet in fluid communication with a plurality of fluid outlets via discrete fluid paths. The method includes the steps of engaging the, or each, fluid inlet of the base to a fluid supply in a sealing manner, charging the base with pressurized fluid until a predetermined pressure is reached, and monitoring the pressure in the base for a predetermined period of time, wherein a rate of pressure decay is indicative of an integrity of the base.
Public/Granted literature
- US20100045730A1 METHOD FOR TESTING INTEGRITY OF A BASE FOR PRINTHEAD INTEGRATED CIRCUITRY Public/Granted day:2010-02-25
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