Invention Grant
US07770040B2 Method and apparatus for reducing power consumption of a co-processor by switching to low power dedicated memory in which image data is periodically updated 有权
通过切换到其中周期性更新图像数据的低功率专用存储器来减少协处理器的功耗的方法和装置

  • Patent Title: Method and apparatus for reducing power consumption of a co-processor by switching to low power dedicated memory in which image data is periodically updated
  • Patent Title (中): 通过切换到其中周期性更新图像数据的低功率专用存储器来减少协处理器的功耗的方法和装置
  • Application No.: US11388928
    Application Date: 2006-03-24
  • Publication No.: US07770040B2
    Publication Date: 2010-08-03
  • Inventor: Milivoje AleksicAris BalatsosCharles Leung
  • Applicant: Milivoje AleksicAris BalatsosCharles Leung
  • Applicant Address: US CA San Diego
  • Assignee: QUALCOMM Incorporated
  • Current Assignee: QUALCOMM Incorporated
  • Current Assignee Address: US CA San Diego
  • Agent Timothy F. Loomis; Michael J. DeHaemer
  • Main IPC: G06F1/32
  • IPC: G06F1/32
Method and apparatus for reducing power consumption of a co-processor by switching to low power dedicated memory in which image data is periodically updated
Abstract:
To provide reduced power consumption of a co-processor, a low power dedicated memory is provided. During a low power state, a processing component of the co-processor is instructed to use the low power dedicated memory and a first memory device, normally used by the processing component, is thereafter operated in a reduced power mode for the duration of the low power state. Preferably, the low power dedicated memory has a storage capacity that is significantly less than the storage capacity of the first memory. When an operating state other than the low power state is detected, normal power consumption by the first memory is resumed and the co-processor is directed to use the first memory once again. In this manner, the present invention allows co-processors, and preferably graphics co-processors, to operate in a beneficial low power mode thereby reducing power consumption.
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