Invention Grant
US07769985B2 Load address dependency mechanism system and method in a high frequency, low power processor system
失效
在高频，低功耗处理器系统中加载地址依赖机制系统和方法
- Patent Title: Load address dependency mechanism system and method in a high frequency, low power processor system
- Patent Title (中): 在高频，低功耗处理器系统中加载地址依赖机制系统和方法
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Application No.: US12025658Application Date: 2008-02-04
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Publication No.: US07769985B2Publication Date: 2010-08-03
- Inventor: Brian David Barrick , Kimberly Marie Fernsler , Dwain Alan Hicks , David Scott Ray , David Shippy , Takeki Osanai
- Applicant: Brian David Barrick , Kimberly Marie Fernsler , Dwain Alan Hicks , David Scott Ray , David Shippy , Takeki Osanai
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Matthew B. Talpis
- Main IPC: G06F9/316
- IPC: G06F9/316
Abstract:
The present invention provides for a method for a load address dependency mechanism in a high frequency, low power processor. A load instruction corresponding to a memory address is received. At least one unexecuted preceding instruction corresponding to the memory address is identified. The load instruction is stored in a miss queue. And the load instruction is tagged as a local miss.
Public/Granted literature
- US20080141014A1 LOAD ADDRESS DEPENDENCY MECHANISM SYSTEM AND METHOD IN A HIGH FREQUENCY, LOW POWER PROCESSOR SYSTEM Public/Granted day:2008-06-12
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