Invention Grant
- Patent Title: Timing recovery circuit
- Patent Title (中): 定时恢复电路
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Application No.: US11386342Application Date: 2006-03-22
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Publication No.: US07769122B2Publication Date: 2010-08-03
- Inventor: Masashi Sato , Yutaka Awata
- Applicant: Masashi Sato , Yutaka Awata
- Applicant Address: JP Kawasaki
- Assignee: Fujitsu Limited
- Current Assignee: Fujitsu Limited
- Current Assignee Address: JP Kawasaki
- Agency: Katten Muchin Rosenman LLP
- Priority: JP2005-351909 20051206
- Main IPC: H03D3/24
- IPC: H03D3/24

Abstract:
A timing recovery circuit capable of enhancing the reliability of timing recovery in a receiver apparatus in a communication system that employs the scheme of modulating the amplitude of a carrier wave. In the receiver apparatus which receives a transmitted signal created by modulating the amplitude of the carrier wave, and which comprises an AD converter for converting the received signal into a digital signal by sampling the received signal at an n-times oversampling rate, the timing recovery circuit which recovers a clock signal by extracting timing information from the output of the AD converter is constructed by containing therein a decimation filter for decimating the output of the AD converter down to an m-times oversampling rate (where 1
Public/Granted literature
- US20070127600A1 Timing recovery circuit Public/Granted day:2007-06-07
Information query
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