A single-ended differential sense amplifier comprises a dynamic reference voltage generation circuit and a differential sense amplifier circuit. Input data with an input data line voltage is provided to the differential sense amplifier circuit. The input data line voltage also feeds back to the dynamic reference voltage generation circuit, which then generates a dynamic reference voltage based on the input data line voltage. The differential sense amplifier circuit is coupled to the dynamic reference voltage generation circuit and receives the dynamic reference voltage for determining the input data. The dynamic reference voltage increases and the input data line voltage decreases when reading the input data of a logic state, e.g., logic “0.”