Invention Grant
US07767524B2 Method and structure for forming a shielded gate field effect transistor
有权
用于形成屏蔽栅场效应晶体管的方法和结构
- Patent Title: Method and structure for forming a shielded gate field effect transistor
- Patent Title (中): 用于形成屏蔽栅场效应晶体管的方法和结构
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Application No.: US12582487Application Date: 2009-10-20
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Publication No.: US07767524B2Publication Date: 2010-08-03
- Inventor: Hamza Yilmaz , Daniel Calafut , Steven Sapp , Nathan Kraft , Ashok Challa
- Applicant: Hamza Yilmaz , Daniel Calafut , Steven Sapp , Nathan Kraft , Ashok Challa
- Applicant Address: US ME South Portland
- Assignee: Fairchild Semiconductor Corporatiion
- Current Assignee: Fairchild Semiconductor Corporatiion
- Current Assignee Address: US ME South Portland
- Agency: Townsend and Townsend and Crew LLP
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L23/62
Abstract:
A method of forming a charge balance MOSFET includes the following steps. A substrate with an overlying epitaxial layer both of a first conductivity type, are provided. A gate trench extending through the epitaxial layer and terminating within the substrate is formed. A shield dielectric lining sidewalls and bottom surface of the gate trench is formed. A shield electrode is formed in the gate trench. A gate dielectric layer is formed along upper sidewalls of the gate trench. A gate electrode is formed in the gate trench such that the gate electrode extends over but is insulated from the shield electrode. A deep dimple extending through the epitaxial layer and terminating within the substrate is formed such that the deep dimple is laterally spaced from the gate trench. The deep dimple is filled with silicon material of the second conductivity type.
Public/Granted literature
- US20100038708A1 Method and Structure for Forming a Shielded Gate Field Effect Transistor Public/Granted day:2010-02-18
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