Invention Grant
US07752591B2 Board layout check apparatus and board layout check method for guard wiring
失效
保护布线板布局检查装置和板布局检查方法
- Patent Title: Board layout check apparatus and board layout check method for guard wiring
- Patent Title (中): 保护布线板布局检查装置和板布局检查方法
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Application No.: US11826764Application Date: 2007-07-18
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Publication No.: US07752591B2Publication Date: 2010-07-06
- Inventor: Takehide Matsumoto
- Applicant: Takehide Matsumoto
- Applicant Address: JP Osaka-Shi
- Assignee: Sharp Kabushiki Kaisha
- Current Assignee: Sharp Kabushiki Kaisha
- Current Assignee Address: JP Osaka-Shi
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Priority: JP2006-195662 20060718
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
There is provided a board layout check apparatus for checking whether or not a guard wiring is appropriately formed, wherein a place which must be corrected is clearly displayed.The board layout check apparatus includes a printed board obtained by forming a guard wiring on a printed wiring layer, a check target wiring detecting unit which detects a check target wiring the influence of noise of which must be reduced from the printed wiring layer, a guard wiring exemption region calculating unit which calculates a guard wiring exemption region in which no guard wiring is formed for the check target wiring, a guard wiring detecting unit which detects a wiring portion in which a guard wiring is formed for the check target wiring, an error determination unit which determines whether or not the guard wiring is appropriately formed in a region except for the guard wiring exemption region, and an output unit which outputs a wiring portion determined as an error by the error determination unit.
Public/Granted literature
- US20080022242A1 Board layout check apparatus and board layout check method Public/Granted day:2008-01-24
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