Invention Grant
- Patent Title: Method and apparatus for determining electro-migration in integrated circuit designs
- Patent Title (中): 用于确定集成电路设计中电迁移的方法和装置
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Application No.: US11941927Application Date: 2007-11-17
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Publication No.: US07752582B2Publication Date: 2010-07-06
- Inventor: Palkesh Jain , Ajoy Mandal
- Applicant: Palkesh Jain , Ajoy Mandal
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Dawn V. Stephens; Wade James Brady, III; Frederick J. Telecky, Jr.
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A method and apparatus for determining electro-migration (EM) in integrated circuit designs is disclosed. In one embodiment, a method includes pre-characterizing an output current waveform for a logic cell of the circuit at selected load and input slew points, estimating an effective load and operating slews at a chip level of the circuit and directly generating an equivalent current source waveform at output, evaluating current densities through a metal segment of the circuit using a fast solver, parametrically representing process variations and a netlist to parametrically model the interconnect variations of the circuit, and determining current densities for selected yield numbers using a parametrically generated current source on an interconnect network, wherein calculated results statistically predict a point of current density less than 9−σ a through any metal segment in the parametrically modeled circuit. The method may further include comparing selected current densities with predetermined EM guidelines.
Public/Granted literature
- US20090132972A1 METHOD AND APPARATUS FOR DETERMINING ELECTRO-MIGRATION IN INTEGRATED CIRCUIT DESIGNS Public/Granted day:2009-05-21
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