Invention Grant
US07750650B2 Solid high aspect ratio via hole used for burn-in boards, wafer sort probe cards, and package test load boards with electronic circuitry
失效
用于老化板,晶圆分选探针卡和带电子电路的封装测试负载板的固体高纵横比通孔
- Patent Title: Solid high aspect ratio via hole used for burn-in boards, wafer sort probe cards, and package test load boards with electronic circuitry
- Patent Title (中): 用于老化板,晶圆分选探针卡和带电子电路的封装测试负载板的固体高纵横比通孔
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Application No.: US11685866Application Date: 2007-03-14
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Publication No.: US07750650B2Publication Date: 2010-07-06
- Inventor: Romi O. Mayder
- Applicant: Romi O. Mayder
- Applicant Address: SG Singapore
- Assignee: Verigy (Singapore) Pte. Ltd.
- Current Assignee: Verigy (Singapore) Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Holland & Hart, LLP
- Main IPC: G01R1/02
- IPC: G01R1/02 ; H01R12/04

Abstract:
A method, and apparatus resulting from the method, for fabricating a circuit board suitable for mounting electronic components. The method includes drilling a plurality of through-holes in a plurality of dielectric sheets, forming a conductive film on at least one side of each of the plurality of dielectric sheets, and substantially filling each of the plurality of through holes with a conductive material. The conductive material is both electrically and thermally uninterrupted from a first face to a second face of each of the plurality of dielectric sheets. The plurality of dielectric sheets are then sequentially mounted, on atop another, to form the circuit board. The sequential mounting step is performed after the steps of drilling the plurality of through-holes, forming the conductive layer, and substantially filling the plurality of through-holes.
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