Invention Grant
- Patent Title: Method and system for improving the manufacturability of integrated circuits
- Patent Title (中): 提高集成电路可制造性的方法和系统
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Application No.: US11720127Application Date: 2004-11-30
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Publication No.: US07735029B2Publication Date: 2010-06-08
- Inventor: Lionel Riviere-Cazaux
- Applicant: Lionel Riviere-Cazaux
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- International Application: PCT/EP2004/014918 WO 20041130
- International Announcement: WO2006/058560 WO 20060608
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
At a particular stage in design of an integrated circuit, DFM improvements are identified which might conflict with design requirements applicable during a subsequent stage in the design flow. These DFM improvements are “reserved” that is, they are not implemented right away. However, an instance of a DFM-optimized version of this portion of the design is generated, characterized and stored. Meta information is associated with the reserved DFM improvements, for example locations in the design which correspond to the reserved DFM improvements are tagged. If, after the subsequent stage in the design flow, processing of the meta-information (tags) shows that the reserved DFM improvement does not actually conflict with the potentially-conflicting design requirement, the corresponding reserved DFM improvement is implemented, for example, by swapping-in the stored instance of the DFM-optimized version of this portion of the design.
Public/Granted literature
- US20080134106A1 Method And System For Improving The Manufacturability Of Integrated Circuits Public/Granted day:2008-06-05
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