Invention Grant
US07709349B2 Semiconductor device manufactured using a gate silicidation involving a disposable chemical/mechanical polishing stop layer
有权
使用涉及一次性化学/机械抛光停止层的栅极硅化物制造的半导体器件
- Patent Title: Semiconductor device manufactured using a gate silicidation involving a disposable chemical/mechanical polishing stop layer
- Patent Title (中): 使用涉及一次性化学/机械抛光停止层的栅极硅化物制造的半导体器件
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Application No.: US11750439Application Date: 2007-05-18
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Publication No.: US07709349B2Publication Date: 2010-05-04
- Inventor: Mark R. Visokay
- Applicant: Mark R. Visokay
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Warren L. Franz; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H01L21/76
- IPC: H01L21/76 ; H01L21/4763
Abstract:
In one aspect, there is provided a method of manufacturing a semiconductor device that comprises placing a blocking layer, a CMP stop layer and a bulk oxide layer over an oxide cap layer that is located over gate structures and source/drains located adjacent thereto. The bulk oxide layer and the CMP stop layer are removed with a CMP process to expose the top of gate electrodes and are removed from over the source/drain areas with a wet etch. The CMP stop layer has a CMP removal rate that is less than a CMP removal rate of the bulk oxide layer and has a wet etch removal rate that is greater than a wet etch removal rate of the blocking layer.
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