Invention Grant
- Patent Title: Method for reducing overlap capacitance in field effect transistors
- Patent Title (中): 降低场效应晶体管重叠电容的方法
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Application No.: US12173098Application Date: 2008-07-15
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Publication No.: US07709333B2Publication Date: 2010-05-04
- Inventor: Huilong Zhu , Oleg Gluschenkov
- Applicant: Huilong Zhu , Oleg Gluschenkov
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent H. Daniel Schnurmann
- Main IPC: H01L21/336
- IPC: H01L21/336
Abstract:
A field effect transistor (FET) device includes a gate conductor formed over a semiconductor substrate, a source region having a source extension that overlaps and extends under the gate conductor, and a drain region having a drain extension that overlaps and extends under the gate conductor only at selected locations along the width of the gate conductor.
Public/Granted literature
- US20080299732A1 METHOD FOR REDUCING OVERLAP CAPACITANCE IN FIELD EFFECT TRANSISTORS Public/Granted day:2008-12-04
Information query
IPC分类:
