Invention Grant
US07709305B2 Method for producing partial SOI structures comprising zones connecting a superficial layer and a substrate
有权
用于制造部分SOI结构的方法，包括连接表面层和基底的区域
- Patent Title: Method for producing partial SOI structures comprising zones connecting a superficial layer and a substrate
- Patent Title (中): 用于制造部分SOI结构的方法，包括连接表面层和基底的区域
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Application No.: US11673820Application Date: 2007-02-12
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Publication No.: US07709305B2Publication Date: 2010-05-04
- Inventor: Bernard Aspar , Chrystelle Lagahe-Blanchard
- Applicant: Bernard Aspar , Chrystelle Lagahe-Blanchard
- Applicant Address: FR Moirans
- Assignee: Tracit Technologies
- Current Assignee: Tracit Technologies
- Current Assignee Address: FR Moirans
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: FR0601696 20060227
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/84
Abstract:
The invention relates to a method for producing a semiconductor structure comprising a superficial layer, at least one embedded layer, and a support, which method comprises: a step of forming, on a first support, patterns in a first material, a step of forming a semiconductor layer, between and on said patterns, a step of assembling said semiconductor layer with a second support.
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