Invention Grant
- Patent Title: Memory elements having patterned electrodes and method of forming the same
- Patent Title (中): 具有图案电极的存储元件及其形成方法
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Application No.: US11111917Application Date: 2005-04-22
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Publication No.: US07709289B2Publication Date: 2010-05-04
- Inventor: Jon Daley , Joseph F. Brooks
- Applicant: Jon Daley , Joseph F. Brooks
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dickstein Shapiro LLP
- Main IPC: H01L21/06
- IPC: H01L21/06

Abstract:
A memory element having a resistance variable material and methods for forming the same are provided. The method includes forming a plurality of first electrodes over a substrate and forming a blanket material stack over the first electrodes. The stack includes a plurality of layers, at least one layer of the stack includes a resistance variable material. The method also includes forming a first conductive layer on the stack and etching the conductive layer and at least one of the layers of the stack to form a first pattern of material stacks. The etched first conductive layer forming a plurality of second electrodes with a portion of the resistance variable material located between each of the first and second electrodes.
Public/Granted literature
- US20060240616A1 Memory elements having patterned electrodes and method of forming the same Public/Granted day:2006-10-26
Information query
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