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US07707236B2 Methods and apparatus for an efficient floating point ALU 有权
用于高效浮点ALU的方法和装置

Methods and apparatus for an efficient floating point ALU
Abstract:
The present invention provides an improved technique for performing a near processing path exponent difference in an arithmetic logic unit (ALU) of a microprocessor. In one embodiment, an apparatus having a separate logic circuit for near processing path and far processing path subtraction generates exponent difference signals using only two least significant bits of exponents of the two floating point operands to perform the exponent difference.
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