Invention Grant
- Patent Title: Methods and apparatus for an efficient floating point ALU
- Patent Title (中): 用于高效浮点ALU的方法和装置
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Application No.: US11157650Application Date: 2005-06-21
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Publication No.: US07707236B2Publication Date: 2010-04-27
- Inventor: Saurbh Srivastava
- Applicant: Saurbh Srivastava
- Applicant Address: US MA Norwood
- Assignee: Analog Devices, Inc.
- Current Assignee: Analog Devices, Inc.
- Current Assignee Address: US MA Norwood
- Agency: Goodwin Procter LLP
- Main IPC: G06F7/42
- IPC: G06F7/42

Abstract:
The present invention provides an improved technique for performing a near processing path exponent difference in an arithmetic logic unit (ALU) of a microprocessor. In one embodiment, an apparatus having a separate logic circuit for near processing path and far processing path subtraction generates exponent difference signals using only two least significant bits of exponents of the two floating point operands to perform the exponent difference.
Public/Granted literature
- US20060036667A1 Methods and apparatus for an efficient floating point ALU Public/Granted day:2006-02-16
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