Invention Grant
US07706201B2 Integrated circuit with Resistivity changing memory cells and methods of operating the same
有权
具有电阻率变化的存储单元的集成电路及其操作方法
- Patent Title: Integrated circuit with Resistivity changing memory cells and methods of operating the same
- Patent Title (中): 具有电阻率变化的存储单元的集成电路及其操作方法
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Application No.: US11778549Application Date: 2007-07-16
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Publication No.: US07706201B2Publication Date: 2010-04-27
- Inventor: Corvin Liaw , Michael Angerbauer , Peter Schroegmeier
- Applicant: Corvin Liaw , Michael Angerbauer , Peter Schroegmeier
- Applicant Address: DE Munich FR Corbeil Essonnes Cedex
- Assignee: Qimonda AG,ALTIS Semiconductor, SNC
- Current Assignee: Qimonda AG,ALTIS Semiconductor, SNC
- Current Assignee Address: DE Munich FR Corbeil Essonnes Cedex
- Agency: Slater & Matsil, L.L.P.
- Main IPC: G11C7/02
- IPC: G11C7/02

Abstract:
An integrated circuit includes a plurality of resistivity changing memory cells and at least one resistivity changing reference cell; a voltage comparator including a first and second input terminals; a signal line connected to the memory cells, the reference cell, and the second input terminal; and a switching element connecting the first input terminal to the second input terminal. A method of operating the integrated circuit includes closing the switching element; supplying a first voltage to the first input terminal via the signal line and the switching element; opening the switching element; supplying a second voltage to the second input terminal via the signal line; and comparing the first and second voltages using the voltage comparator, wherein the first voltage represents a memory state of a memory cell, and the second voltage is a reference voltage which represents a memory state of a reference cell, or vice versa.
Public/Granted literature
- US20090021976A1 Method of Operating an Integrated Circuit, Integrated Circuit, and Memory Module Public/Granted day:2009-01-22
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