Invention Grant
US07675811B2 Method and apparatus for DQS postamble detection and drift compensation in a double data rate (DDR) physical interface
有权
用于在双数据速率(DDR)物理接口中进行DQS后同步码检测和漂移补偿的方法和装置
- Patent Title: Method and apparatus for DQS postamble detection and drift compensation in a double data rate (DDR) physical interface
- Patent Title (中): 用于在双数据速率(DDR)物理接口中进行DQS后同步码检测和漂移补偿的方法和装置
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Application No.: US12082100Application Date: 2008-04-07
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Publication No.: US07675811B2Publication Date: 2010-03-09
- Inventor: Lior Amarilio , David Schkolnik , Ophir Nadir
- Applicant: Lior Amarilio , David Schkolnik , Ophir Nadir
- Applicant Address: US CA Santa Clara
- Assignee: Chipx Incorporated
- Current Assignee: Chipx Incorporated
- Current Assignee Address: US CA Santa Clara
- Agency: Abelman, Frayne & Schwab
- Main IPC: G11C8/18
- IPC: G11C8/18 ; G11C7/00

Abstract:
Circuitry for reading from a double data rate type memory, the circuitry including control logic, a first bi-directional input/output interface (I/O) configured to be coupled to a data bus of a double data rate type memory and to receive therefrom a data transmission having a duration selected by the control logic, a second bi-directional input/output interface (I/O) configured to be coupled to a data strobe line of the double data rate type memory, a gate coupled to the second bi-directional input/output interface configured for controlling the duration of a data strobe signal received along the data strobe line in response to a data strobe masking gating signal and a data strobe masking gating signal modifier applying to the expected data receipt duration indicating signal a variable time delay such as to center the expected data receipt duration indicating signal about the midpoint of the duration of the data transmission.
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