Invention Grant
- Patent Title: Multilevel memory cell operation
- Patent Title (中): 多层存储单元操作
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Application No.: US11924793Application Date: 2007-10-26
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Publication No.: US07675772B2Publication Date: 2010-03-09
- Inventor: Akira Goda , Seiichi Aritome
- Applicant: Akira Goda , Seiichi Aritome
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Brooks, Cameron & Huebsch, PLLC
- Main IPC: G11C11/34
- IPC: G11C11/34

Abstract:
One or more embodiments of the present disclosure provide methods, devices, and systems for operating non-volatile multilevel memory cells. One method embodiment includes programming a memory cell to one of a number of different threshold voltage (Vt) levels, each level corresponding to a program state. The method includes programming a reference cell to a Vt level at least as great as an uppermost Vt level of the number of different Vt levels, performing a read operation on the reference cell, and determining a number of read reference voltages used to determine a particular program state of the memory cell based on the read operation performed on the reference cell.
Public/Granted literature
- US20090109743A1 MULTILEVEL MEMORY CELL OPERATION Public/Granted day:2009-04-30
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