Invention Grant
US07675334B2 Delay locked loop circuit and semiconductor integrated circuit device 有权
延迟锁定环电路和半导体集成电路器件

Delay locked loop circuit and semiconductor integrated circuit device
Abstract:
A technology capable of avoiding malfunction of a delay locked loop without generating a constant phase error in a delay locked loop circuit is provided. In a delay locked loop circuit, a control circuit is disposed in the outside of a delay locked loop, and in phase comparison of the delay locked loop, the control circuit outputs a control signal to the delay locked loop so that the relation in the phase comparison between a reference signal and an output signal is shifted by a set cycle.
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