Invention Grant
- Patent Title: Receiver circuit
- Patent Title (中): 接收电路
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Application No.: US12081154Application Date: 2008-04-11
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Publication No.: US07675314B2Publication Date: 2010-03-09
- Inventor: Tsuyoshi Ebuchi , Toru Iwata , Takefumi Yoshikawa
- Applicant: Tsuyoshi Ebuchi , Toru Iwata , Takefumi Yoshikawa
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2002-346153 20021128
- Main IPC: H03K19/007
- IPC: H03K19/007

Abstract:
In a receiver circuit that receives data and clock signals through the cables, the number of transitions of a signal obtained based on the data or clock signal is detected by a frequency detection circuit, and when the number of transitions is not more than a predetermined set value, a signal for resetting the operation of a serial-parallel converter circuit included in a data processing unit is output, so as to control the output of received data. Thus, disconnection of the cable can be detected with low power consumption without providing a pull-up resistor and pull-down resistor and noise resistance can be improved.
Public/Granted literature
- US20080315911A1 Receiver circuit Public/Granted day:2008-12-25
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