Invention Grant
US07675155B2 Carrier structure stacking system and method 有权
载体结构堆垛系统及方法

Carrier structure stacking system and method
Abstract:
The present invention provides a system and method for selectively stacking and interconnecting leaded packaged integrated circuit devices with connections between the feet of leads of an upper IC and the upper shoulder of leads of a lower IC while conductive transits that implement stacking-related intra-stack connections between the constituent ICs are implemented in multi-layer interposers or carrier structures oriented along the leaded sides of the stack, with selected ones of the conductive transits electrically interconnected with other selected ones of the conductive transits.
Public/Granted literature
Information query
Patent Agency Ranking
0/0