Invention Grant
US07675153B2 Semiconductor device having semiconductor chips stacked and mounted thereon and manufacturing method thereof
有权
具有堆叠并安装在其上的半导体芯片的半导体器件及其制造方法
- Patent Title: Semiconductor device having semiconductor chips stacked and mounted thereon and manufacturing method thereof
- Patent Title (中): 具有堆叠并安装在其上的半导体芯片的半导体器件及其制造方法
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Application No.: US11344063Application Date: 2006-02-01
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Publication No.: US07675153B2Publication Date: 2010-03-09
- Inventor: Tetsuya Kurosawa , Junya Sagara
- Applicant: Tetsuya Kurosawa , Junya Sagara
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
- Priority: JP2005-026698 20050202; JP2005-026699 20050202
- Main IPC: H01L23/02
- IPC: H01L23/02

Abstract:
Chips are stacked and mounted on a circuit board having external connection electrodes and mounted thereon by wire bonding. At least one of the chips stacked on the chip includes overhung portions each of which has a start point inside bonding pads, is made thinner in a direction towards the outer periphery to an end point reaching the side wall and forms a space used to accommodate ball bonding portions between the overhung portion and the main surface of the chip arranged in the lower stage on a backside corresponding in position to the bonding pads, and insulating members formed to cover the overhung portions and prevent bonding wires of the chip arranged in the lower stage from being brought into contact with the upper-stage chip.
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