Invention Grant
- Patent Title: Semiconductor memory device
- Patent Title (中): 半导体存储器件
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Application No.: US11889704Application Date: 2007-08-15
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Publication No.: US07675122B2Publication Date: 2010-03-09
- Inventor: Yuuichi Hirano , Takashi Ipposhi , Shigeto Maegawa , Koji Nii
- Applicant: Yuuichi Hirano , Takashi Ipposhi , Shigeto Maegawa , Koji Nii
- Applicant Address: JP Tokyo
- Assignee: Renesas Technology Corp.
- Current Assignee: Renesas Technology Corp.
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: JP2003-304444 20030828; JP2004-193462 20040630
- Main IPC: H01L29/76
- IPC: H01L29/76 ; H01L29/94

Abstract:
A contact connected to a word line is formed on a gate electrode of an access transistor of an SRAM cell. The contact passes through an element isolation insulating film to reach an SOI layer. A body region of a driver transistor and that of the access transistor are electrically connected with each other through the SOI layer located under the element isolation insulating film. Therefore, the access transistor is in a DTMOS structure having the gate electrode connected with the body region through the contact, which in turn is also electrically connected to the body region of the driver transistor. Thus, operations can be stabilized while suppressing increase of an area for forming the SRAM cell.
Public/Granted literature
- US20080211035A1 Semiconductor memory device and method of manufacturing the same Public/Granted day:2008-09-04
Information query
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