Invention Grant
- Patent Title: Semiconductor device and manufacturing method thereof
- Patent Title (中): 半导体器件及其制造方法
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Application No.: US11952675Application Date: 2007-12-07
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Publication No.: US07675119B2Publication Date: 2010-03-09
- Inventor: Tetsuya Taguwa
- Applicant: Tetsuya Taguwa
- Applicant Address: JP Tokyo
- Assignee: Elpida Memory, Inc.
- Current Assignee: Elpida Memory, Inc.
- Current Assignee Address: JP Tokyo
- Agency: Sughrue Mion, PLLC
- Priority: JP2006-347874 20061225; JP2007-281918 20071030
- Main IPC: H01L29/78
- IPC: H01L29/78

Abstract:
A semiconductor device includes an N-channel transistor having an N-type gate electrode and a P-channel transistor having a P-type gate electrode which are formed on a semiconductor substrate. The P-type gate electrode includes a first silicon layer formed as the lowest layer, and doped with a P-type impurity; a second silicon layer formed on the first silicon layer; and a metal containing layer formed on the second silicon layer. The N-type gate electrode includes a third silicon layer formed as the lowest layer and doped with an N-type impurity; a fourth silicon layer formed on the third silicon layer; and a metal containing layer formed on the fourth silicon layer. At least one of the second silicon layer and the fourth silicon layer is doped with no impurity or an impurity of a conductive type opposite to that of the impurity in a corresponding one of the first silicon layer and third silicon layer.
Public/Granted literature
- US20080150035A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2008-06-26
Information query
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