Semiconductor device manufacturing method for forming diffused layers by impurity implantation using gate wiring layer mask

Invention Grant

US07674676B2 Semiconductor device manufacturing method for forming diffused layers by impurity implantation using gate wiring layer mask 失效

Title translation: 用于通过使用栅极布线层掩模的杂质注入形成扩散层的半导体器件制造方法

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Patent Title: Semiconductor device manufacturing method for forming diffused layers by impurity implantation using gate wiring layer mask
Patent Title (中): 用于通过使用栅极布线层掩模的杂质注入形成扩散层的半导体器件制造方法
Application No.: US12049414

Application Date: 2008-03-17
Publication No.: US07674676B2

Publication Date: 2010-03-09
Inventor: Kazuo Ogawa , Yoshihiro Takaishi
Applicant: Kazuo Ogawa , Yoshihiro Takaishi
Applicant Address: JP Tokyo
Assignee: Elpida Memory, Inc.
Current Assignee: Elpida Memory, Inc.
Current Assignee Address: JP Tokyo
Agency: Young & Thompson
Priority: JP2007-068539 20070316
Main IPC: H01L21/8242
IPC: H01L21/8242 ; H01L27/108

Semiconductor device manufacturing method for forming diffused layers by impurity implantation using gate wiring layer mask

Abstract:

A method of manufacturing a semiconductor device with diffused layers by impurity implantation includes forming a first mask including an opening, implanting a channel impurity for threshold voltage control using the first mask, forming a first diffused layer using the first mask by implanting a first impurity, forming a first gate wiring layer and a second gate wiring layer after removing the first mask, and forming a second diffused layer and a third diffused layer using the first gate wiring layer and the second gate wiring layer as a second mask by implanting a second impurity.

Abstract(Chinese):

通过杂质注入制造具有扩散层的半导体器件的方法包括形成包括开口的第一掩模，使用第一掩模注入用于阈值电压控制的沟道杂质，通过注入第一杂质形成使用第一掩模的第一扩散层，在去除第一掩模之后形成第一栅极布线层和第二栅极布线层，并且使用第一栅极布线层和第二栅极布线层形成第二扩散层和第三扩散层作为第二掩模，通过注入第二杂质。

Public/Granted literature

US20080227253A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2008-09-18

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺
H01L21/8239	........存储器结构
H01L21/8242	.........动态随机存取存储结构（DRAM）