Invention Grant
US07672175B2 System and method of selectively applying negative voltage to wordlines during memory device read operation
有权
在存储器件读取操作期间选择性地向字线施加负电压的系统和方法
- Patent Title: System and method of selectively applying negative voltage to wordlines during memory device read operation
- Patent Title (中): 在存储器件读取操作期间选择性地向字线施加负电压的系统和方法
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Application No.: US11972696Application Date: 2008-01-11
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Publication No.: US07672175B2Publication Date: 2010-03-02
- Inventor: Sei Seung Yoon , Cheng Zhong , Dongkyu Park , Mohamed Hassan Abu-Rahma
- Applicant: Sei Seung Yoon , Cheng Zhong , Dongkyu Park , Mohamed Hassan Abu-Rahma
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agent Sam Talpalatsky; Nicholas J. Pauley; Peter M. Kamarchik
- Main IPC: G11C7/22
- IPC: G11C7/22

Abstract:
Systems and methods of selectively applying negative voltage to word lines during memory device read operation are disclosed. In an embodiment, a memory device includes a word line logic circuit coupled to a plurality of word lines and adapted to selectively apply a positive voltage to a selected word line coupled to a selected memory cell that includes a magnetic tunnel junction (MTJ) device and to apply a negative voltage to unselected word lines.
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