Invention Grant
- Patent Title: Signal output adjustment circuit and display driver
- Patent Title (中): 信号输出调节电路和显示驱动器
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Application No.: US10912247Application Date: 2004-08-06
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Publication No.: US07671853B2Publication Date: 2010-03-02
- Inventor: Akira Morita
- Applicant: Akira Morita
- Applicant Address: JP Tokyo
- Assignee: Seiko Epson Corporation
- Current Assignee: Seiko Epson Corporation
- Current Assignee Address: JP Tokyo
- Agency: Oliff & Berridge, PLC
- Priority: JP2003-310534 20030902
- Main IPC: G09G5/00
- IPC: G09G5/00 ; G06F3/038

Abstract:
A signal output adjustment circuit includes a decoder which decodes command data from a memory, a control register in which control data corresponding to first command data is set when the decoder determines that the command data is the first command data, a buffer in which the control data corresponding to second command data is stored when the decoder determines that the command data is the second command data, and an output adjustment circuit which reads the control data stored in the buffer and outputs the control data in synchronization with a data fetch signal, based on a value set in the control register. At least one of permission/rejection of inversion output of the data fetch signal and output timing of the data fetch signal is set based on the value set in the control register.
Public/Granted literature
- US20050062733A1 Signal output adjustment circuit and display driver Public/Granted day:2005-03-24
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