Invention Grant
US07657725B2 Integrated circuit with memory-less page table 有权
集成电路与无内存页表

Integrated circuit with memory-less page table
Abstract:
A system is disclosed that comprises a processor, a memoryless first level page table addressable by the processor, and a second level page table stored in a memory coupled to the processor. The second level page table is addressable by at least one entry of the first level page table.
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