A memory card controller is provided with a clock start/end control unit that suspends supply of a clock signal to the memory card when a data amount transferred from the memory card as a result of the transfer operation reaches a data amount specified by an nth command received from the host device. The memory card controller resumes supply of the clock signal to the memory card if a subsequent command received with supply of the clock signal to the SD card in a suspended state specifies an address consecutive to an end address of data transfer requested by the nth command as a start address.